The International Institute of Information Technology (IIIT) Naya Raipur, in
collaboration with the IEEE Student Branch, will host a two-day national symposium
and ideathon, “MakeInSilicon,” on November 7-8, 2025. The event aims to foster a
new generation of technical talent and accelerate India’s ambition for a self-reliant
semiconductor ecosystem.
The symposium comes at a crucial time as India’s semiconductor market is projected
to reach over $100 billion by 2030. With the government’s significant investment
through the India Semiconductor Mission (ISM), the focus has shifted from mere
consumption, to building a complete domestic value chain, encompassing design,
manufacturing, and packaging.
A Catalyst for Technical Innovation
The “MakeInSilicon” ideathon is designed to engage participants in solving real-
world challenges within the semiconductor domain. The contest offers a prize pool of
₹75,000 and is structured around three core tracks:
Circuits and Systems: This track challenges participants to design and
innovate at the system level, focusing on the integration of hardware and
software for specific applications.
Semiconductor Devices & Packaging: This area delves into the fundamental
building blocks of electronics. Submissions in this track are expected to
explore novel device architectures, materials, and advanced packaging
techniques like 3D integration to enhance chip performance and power
efficiency.
Flexible Electronics: A forward-looking track that encourages the development
of flexible and wearable electronic devices. This field is critical for applications
in healthcare, smart textiles, and the Internet of Things (IoT), where traditional
rigid silicon chips are unsuitable.
Bridging Academia and Industry
The event’s emphasis on indigenous infrastructure aligns with the broader national
strategy of reducing reliance on global supply chains. By bringing together students,
researchers, and industry experts, “MakeInSilicon” seeks to create a platform for
knowledge exchange and collaborative development. The symposium will feature
technical talks and networking opportunities, providing attendees with insights into
the latest advancements in semiconductor technology, from cutting-edge 3nm and
2nm chip designs—as recently achieved by companies with R&D centers in
India—to the development of Silicon Carbide (SiC) and Gallium Nitride (GaN)
devices. The ideathon serves as a practical application of theoretical knowledge,
encouraging participants to turn their conceptual ideas into tangible, technical
solutions.
Prof. (Dr.) Om Prakash Vyas, Director IIIT-NR, said that by participating in the
MakeInSilicon National Symposium, students and researchers can showcase their
innovative ideas, collaborate with industry experts, and contribute to the growth of
Chhattisgarh’s technological landscape. He further added that all stakeholders can
join this groundbreaking initiative and shape the future of semiconductor innovation
in India. The event is being coordinated by Dr. Manoj Majumder, Dr. Shrivishal
Tripathi, Dr. Deepika Gupta and Dr. Shashi Tiwari from IIIT-NR. The registration fee
is ₹590 per team, with the deadline for registration set for September 30, 2025.
Further details are available on IIIT-NR website.